CHUANGXINDA ELECTRONICS-TECH CO., LIMITED
CHUANGXINDA ELECTRONICS-TECH CO., LIMITED
Add to Cart
EP4SGX110DF29C4N Industrial Electronic Components FBGA-780
| Product Attribute | Attribute Value |
|---|---|
| Intel | |
| FPGA - Field Programmable Gate Array | |
| Stratix IV GX | |
| 372 I/O | |
| 900 mV | |
| 0 C | |
| + 70 C | |
| SMD/SMT | |
| FBGA-780 | |
| Tray | |
| Data Rate: | 600 Mb/s to 8.5 Gb/s |
| Series: | Stratix IV GX |
| Brand: | Intel / Altera |
| Maximum Operating Frequency: | 600 MHz |
| Moisture Sensitive: | Yes |
| Number of Transceivers: | 8 Transceiver |
| Product Type: | FPGA - Field Programmable Gate Array |
| Factory Pack Quantity: | 36 |
| Subcategory: | Programmable Logic ICs |
| Tradename: | Stratix |
Feature Summary
The following list summarizes the Stratix IV device family features:
■ Up to 48 full-duplex CDR-based transceivers in Stratix IV GX and GT devices supporting data rates up to
8.5 Gbps and 11.3 Gbps, respectively
■ Programmable transmitter pre-emphasis and receiver equalization circuitry to compensate for frequency-dependent losses
in the physical medium
■ Typical physical medium attachment (PMA) power consumption of 100 mW at 3.125 Gbps and 135 mW at 6.375 Gbps per
channel
■ 72,600 to 813,050 equivalent LEs per device
■ 7,370 to 33,294 Kb of enhanced TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory
and FIFO buffers
■ High-speed digital signal processing (DSP) blocks configurable as 9 x 9-bit, 12 x 12-bit, 18 x 18-bit, and 36 x 36-bit full-precision
multipliers at up to 600 MHz
■ Up to 16 global clocks (GCLK), 88 regional clocks (RCLK), and 132 periphery clocks (PCLK) per device
■ Support for high-speed external memory interfaces including DDR, DDR2, DDR3 SDRAM, RLDRAM II, QDR II, and QDR II+
SRAM on up to 24 modular I/O banks
■ High-speed LVDS I/O support with serializer/deserializer (SERDES), dynamic phase alignment (DPA), and soft-CDR circuitry at
data rates up to 1.6 Gbps
■ Support for source-synchronous bus standards, including SGMII, GbE, SPI-4 Phase 2 (POS-PHY Level 4), SFI-4.1, XSBI,
UTOPIA IV, NPSI, and CSIX-L1
■ Pinouts for Stratix IV E devices designed to allow migration of designs from Stratix III to Stratix IV E with minimal PCB impact.
