CHUANGXINDA ELECTRONICS-TECH CO., LIMITED

CHUANGXINDA ELECTRONICS-TECH CO., LIMITED

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XC4VSX25-10FFG668C 320 I/O Virtex 4 FPGA

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CHUANGXINDA ELECTRONICS-TECH CO., LIMITED
City:shenzhen
Province/State:guangdong
Country/Region:china
Contact Person:CXDA-FPGA
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XC4VSX25-10FFG668C 320 I/O Virtex 4 FPGA

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Brand Name :Xilinx Inc.
Model Number :XC4VSX25-10FFG668C
Certification :Lead free / RoHS Compliant
MOQ :1 pcs
Price :USD 300~500 pcs
Payment Terms :T/T, Western Union, Paypal, Trade Assurance, Credit Card
Supply Ability :2545 pcs
Delivery Time :3-5 Day
Packaging Details :International Standard Packaging
Category :Programmable Logic ICs
Condition :Original 100%,Brand New and Original,New
Number of I/Os :320 I/O
Product :Virtex-4
Package / Case :FBGA-668
Distributed RAM :160 kbit
Embedded Block RAM - EBR :2304 kbit
Maximum Operating Frequency :500 MHz
Service :BOM Kitting
Lead time :In Stock,contact us
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XC4VSX25-10FFG668C Xilinx FPGA Chip FBGA-668 320 I/O Virtex-4

Product Attribute Attribute Value
Xilinx
FPGA - Field Programmable Gate Array
Virtex-4
23040
320 I/O
1.2 V
0 C
+ 85 C
SMD/SMT
FBGA-668
Series: XC4VSX25
Brand: Xilinx
Distributed RAM: 160 kbit
Embedded Block RAM - EBR: 2304 kbit
Maximum Operating Frequency: 500 MHz
Moisture Sensitive: Yes
Product Type: FPGA - Field Programmable Gate Array
Factory Pack Quantity: 1
Subcategory: Programmable Logic ICs
Tradename: Virtex

Summary of Virtex-4 FPGA Features


• Up to twenty Digital Clock Manager (DCM) modules
- Precision clock deskew and phase shift
- Flexible frequency synthesis
- Dual operating modes to ease performance trade-off decisions
- Improved maximum input/output frequency
- Improved phase shifting resolution
- Reduced output jitter
- Low-power operation
- Enhanced phase detectors
- Wide phase shift range


• SelectIO™ Technology
- 1.5V to 3.3V I/O operation
- Built-in ChipSync™ source-synchronous technology
- Digitally controlled impedance (DCI) active termination
- Fine grained I/O banking (configuration in one bank)

• Extremely high-performance
- 600 Mb/s HSTL & SSTL (on all single-ended I/O)
- 1 Gb/s LVDS (on all differential I/O pairs)

• True differential termination
• Selected low-capacitance I/Os for improved signal integrity
• Same edge capture at input and output I/Os
• Memory interface support for DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.

XC4VSX25-10FFG668C 320 I/O Virtex 4 FPGA

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