Payment Terms :T/T, Western Union, Paypal, Trade Assurance, Credit Card
Supply Ability :350 pcs
Delivery Time :3-5 Day
Packaging Details :International Standard Packaging
Category :Programmable Logic ICs
Condition :Original 100%,Brand New and Original,New
Number of I/Os :692 I/O
Product :Virtex-II Pro
Package / Case :FBGA-1152
Distributed RAM :606 kbit
Embedded Block RAM - EBR :3456 kbit
Maximum Operating Frequency :300 MHz
Service :BOM Kitting
Lead time :In Stock,contact us
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XC2VP40-5FF1152I Xilinx FPGA Chip FBGA-1152 692 I/O Virtex-II Pro
Product Attribute
Attribute Value
Xilinx
FPGA - Field Programmable Gate Array
Virtex-II Pro
43632
692 I/O
1.5 V
- 40 C
+ 100 C
SMD/SMT
FBGA-1152
Data Rate:
4.25 Gb/s
Series:
XC2VP40
Brand:
Xilinx
Distributed RAM:
606 kbit
Embedded Block RAM - EBR:
3456 kbit
Maximum Operating Frequency:
300 MHz
Moisture Sensitive:
Yes
Number of Transceivers:
12 Transceiver
Product Type:
FPGA - Field Programmable Gate Array
Factory Pack Quantity:
1
Subcategory:
Programmable Logic ICs
Tradename:
Virtex
Summary of Virtex-II Pro™ / Virtex-II Pro X Features
• SelectRAM+ Memory Hierarchy - Up to 8 Mb of True Dual-Port RAM in 18 Kb block SelectRAM+ resources - Up to 1,378 Kb of distributed SelectRAM+ resources - High-performance interfaces to external memory
• Arithmetic Functions - Dedicated 18-bit x 18-bit multiplier blocks - Fast look-ahead carry logic chains
• Flexible Logic Resources - Up to 88,192 internal registers/latches with Clock Enable - Up to 88,192 look-up tables (LUTs) or cascadable variable (1 to 16 bits) shift registers - Wide multiplexers and wide-input function support - Horizontal cascade chain and Sum-of-Products support - Internal 3-state busing
• High-Performance Clock Management Circuitry - Up to twelve Digital Clock Manager (DCM) modules · Precise clock de-skew · Flexible frequency synthesis · High-resolution phase shifting - 16 global clock multiplexer buffers in all parts
General Description
The Virtex-II Pro and Virtex-II Pro X families contain platform FPGAs for designs that are based on IP cores and customized modules. The family incorporates multi-gigabit transceivers and PowerPC CPU blocks in Virtex-II Pro Series FPGA architecture. It empowers complete solutions for telecommunication, wireless, networking, video, and DSP applications.
The leading-edge 0.13 µm CMOS nine-layer copper process and Virtex-II Pro architecture are optimized for high performance designs in a wide range of densities. Combining a wide variety of flexible features and IP cores, the Virtex-II Pro family enhances programmable logic design capabilities and is a powerful alternative to mask-programmed gate arrays.
