CHUANGXINDA ELECTRONICS-TECH CO., LIMITED

CHUANGXINDA ELECTRONICS-TECH CO., LIMITED

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5SGXMA5K2F40C3N 14.1Gb/S 900mV ALTERA FPGA Chip

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CHUANGXINDA ELECTRONICS-TECH CO., LIMITED
City:shenzhen
Province/State:guangdong
Country/Region:china
Contact Person:CXDA-FPGA
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5SGXMA5K2F40C3N 14.1Gb/S 900mV ALTERA FPGA Chip

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Brand Name :Intel / Altera
Model Number :5SGXMA5K2F40C3N
Certification :Lead free / RoHS Compliant
MOQ :1 pcs
Price :USD 6000-7000 pcs
Payment Terms :T/T, Western Union, Paypal, Trade Assurance, Credit Card
Supply Ability :108 pcs
Delivery Time :3-5 Day
Packaging Details :International Standard Packaging
Category :IC FPGA
Condition :Original 100%,Brand New and Original,New
Series :Stratix V GX
Number of Logic Array Blocks - LABs :4224
Number of I/Os :696 I/O
Operating Supply Voltage :900 mV
Package / Case :FBGA-1517
Data Rate :14.1 Gb/s
Service :BOM Kitting
Lead time :In Stock,contact us
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5SGXMA5K2F40C3N ALTERA FPGA Chip FBGA-1517 696 I/O Stratix V GX

Product Attribute Attribute Value
Intel
FPGA - Field Programmable Gate Array
Stratix V GX
490000
185000
696 I/O
900 mV
0 C
+ 70 C
SMD/SMT
FBGA-1517
Tray
Data Rate: 14.1 Gb/s
Series: Stratix V GX 5SGXA5
Brand: Intel / Altera
Moisture Sensitive: Yes
Number of Transceivers: 36 Transceiver
Product Type: FPGA - Field Programmable Gate Array
Factory Pack Quantity: 21
Subcategory: Programmable Logic ICs
Total Memory: 50.65 Mbit
Tradename: Stratix V FPGA
Part # Aliases: 966535

Stratix V Features Summary• 28-nm TSMC process technology
• 0.85-V or 0.9-V core voltage
• 28.05-Gbps transceivers on Stratix V GT devices
• Electronic dispersion compensation (EDC) for XFP, SFP+, QSFP, CFP optical module support
• Adaptive linear and decision feedback equalization
• Transmitter pre-emphasis and de-emphasis
• Dynamic reconfiguration of individual channels
• On-chip instrumentation (EyeQ non-intrusive data eye monitoring)
• 600-Megabits per second (Mbps) to 12.5-Gbps data rate capability
• 1.6-Gbps LVDS
• 1,066-MHz external memory interface
• On-chip termination (OCT)
• 1.2-V to 3.3-V interfacing for all Stratix V devices
• PCIe Gen3, Gen2, and Gen1 complete protocol stack, x1/x2/x4/x8 end point and root port
• Interlaken physical coding sublayer (PCS)
• Gigabit Ethernet (GbE) and XAUI PCS
• 10G Ethernet PCS
• Serial RapidIO® (SRIO) PCS
• Common Public Radio Interface (CPRI) PCS
• Gigabit Passive Optical Networking (GPON) PCS
• Programmable Power Technology
• Quartus II integrated PowerPlay Power Analysis

5SGXMA5K2F40C3N 14.1Gb/S 900mV ALTERA FPGA Chip

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